HRL Laboratories, an IBM company, pioneers the next frontiers of physical and information science. Delivering transformative technologies in automotive, aerospace and defense, HRL advances the critical missions of its customers to help them remove limitations and create competitive advantage. HRL then transitions the work back to customers – ready for real-world application. For more than 70 years, HRL’s rich portfolio of scientific discoveries and engineering innovations continues to build on each other — often in unexpected, profound and far-reaching ways. As a private company owned by IBM, HRL prioritizes purpose over profit, significantly advancing the state of the art. Qubit Systems Laboratory (QSL) is a world leader in semiconductor spin qubits. Our broad expertise spans semiconductor growth, device design and modeling, cryogenic control, high-density interconnects and packaging, quantum architecture, and multiqubit demonstrations. Our system architecture is built entirely around scalable semiconductor manufacturing to make quantum computing affordable for practical business and scientific applications. General Description The Integration Component Design Engineer will develop detailed superconducting component layouts, create automated layout strategies, and collaborate closely with process, RF, and integration engineering teams to ensure manufacturable, high performance designs in support of HRL’s silicon spin quantum computing effort. This role centers on expert level CAD layout execution, automation of design steps, and clear communication of methodologies and design intent to technical leadership. The ideal candidate brings strong proficiency in Virtuoso (and ideally Allegro APD), a solid understanding of foundry process constraints, and familiarity with RF design principles relevant to superconducting transmission structures. Essential Duties • Create, refine, and own complex superconducting component layouts using industry standard CAD tools—Virtuoso strongly preferred, Virtuoso plus Allegro APD ideal. • Collaborate with other design engineers to support simulation analyses, analysis of alternative designs, and design modifications related to measurement feedback. • Develop and implement layout automation strategies including routing, via placement, ground plane slotting, and metal/dielectric fill rules to enhance efficiency and manufacturability. • Incorporate foundry process constraints, design rules, material limitations, and interface behaviors into layout decisions and system level design choices. • Support RF related layout tasks, including transmission line structure creation, parasitic minimization, and adherence to RF design methodologies for cryogenic superconducting components. • Collaborate closely with integration, process, and packaging teams to ensure alignment on layout strategy, connectivity requirements, and manufacturability constraints. • Document layout approaches, automation methods, and design rules; prepare clear summaries and visualizations for presentation to technical leadership. • Troubleshoot layout related issues, resolve DRC/LVS concerns, and support design reviews throughout the development cycle. • Contribute to continuous improvement of layout templates, parameterized cells, automation scripts, and best practice methodologies for superconducting component design. Required Qualifications • BS or MS in Electrical Engineering, Mechanical Engineering, Physics, or a related field. • 5+ years of extensive hands on experience with CAD layout tools: Virtuoso required; Virtuoso plus Allegro APD strongly preferred. • Familiarity with layout automation methods, including routing algorithms, via strategy tuning, ground plane slotting, and metal/dielectric fill techniques. • Understanding of foundry process constraints, design rule interpretation, and materials related layout considerations. • Familiarity with RF design principles, transmission line behavior, and layout methodologies for RF sensitive structures. • Strong communication skills, with the ability to clearly summarize designs, assumptions, and layout strategies for review by senior technical leadership. • Strong problem solving ability with attention to detail, design reliability, and manufacturability. • Experience with scripting or automation tools (Python, or similar) is preferred. Special Requirements: • US Person Status Required Compensation and Benefits: Pay Range: $140,700 - $175,950 HRL Laboratories, an IBM company, pioneers the next frontiers of physical and information science. Delivering transformative technologies in automotive, aerospace and defense, HRL advances the critical missions of its customers to help them remove limitations and create competitive advantage. HRL then transitions the work back to customers – ready for real-world application. For more than 70 years, HRL’s rich portfolio of scientific discoveries and engineering innovations continues to build on each other — often in unexpected, profound and far-reaching ways. As a private company owned by IBM, HRL prioritizes purpose over profit, significantly advancing the state of the art. Qubit Systems Laboratory (QSL) is a world leader in semiconductor spin qubits. Our broad expertise spans semiconductor growth, device design and modeling, cryogenic control, high-density interconnects and packaging, quantum architecture, and multiqubit demonstrations. Our system architecture is built entirely around scalable semiconductor manufacturing to make quantum computing affordable for practical business and scientific applications. General Description The Integration Component Design Engineer will develop detailed superconducting component layouts, create automated layout strategies, and collaborate closely with process, RF, and integration engineering teams to ensure manufacturable, high performance designs in support of HRL’s silicon spin quantum computing effort. This role centers on expert level CAD layout execution, automation of design steps, and clear communication of methodologies and design intent to technical leadership. The ideal candidate brings strong proficiency in Virtuoso (and ideally Allegro APD), a solid understanding of foundry process constraints, and familiarity with RF design principles relevant to superconducting transmission structures. Essential Duties • Create, refine, and own complex superconducting component layouts using industry standard CAD tools—Virtuoso strongly preferred, Virtuoso plus Allegro APD ideal. • Collaborate with other design engineers to support simulation analyses, analysis of alternative designs, and design modifications related to measurement feedback. • Develop and implement layout automation strategies including routing, via placement, ground plane slotting, and metal/dielectric fill rules to enhance efficiency and manufacturability. • Incorporate foundry process constraints, design rules, material limitations, and interface behaviors into layout decisions and system level design choices. • Support RF related layout tasks, including transmission line structure creation, parasitic minimization, and adherence to RF design methodologies for cryogenic superconducting components. • Collaborate closely with integration, process, and packaging teams to ensure alignment on layout strategy, connectivity requirements, and manufacturability constraints. • Document layout approaches, automation methods, and design rules; prepare clear summaries and visualizations for presentation to technical leadership. • Troubleshoot layout related issues, resolve DRC/LVS concerns, and support design reviews throughout the development cycle. • Contribute to continuous improvement of layout templates, parameterized cells, automation scripts, and best practice methodologies for superconducting component design. Required Qualifications • BS or MS in Electrical Engineering, Mechanical Engineering, Physics, or a related field. • 5+ years of extensive hands on experience with CAD layout tools: Virtuoso required; Virtuoso plus Allegro APD strongly preferred. • Familiarity with layout automation methods, including routing algorithms, via strategy tuning, ground plane slotting, and metal/dielectric fill techniques. • Understanding of foundry process constraints, design rule interpretation, and materials related layout considerations. • Familiarity with RF design principles, transmission line behavior, and layout methodologies for RF sensitive structures. • Strong communication skills, with the ability to clearly summarize designs, assumptions, and layout strategies for review by senior technical leadership. • Strong problem solving ability with attention to detail, design reliability, and manufacturability. • Experience with scripting or automation tools (Python, or similar) is preferred. Special Requirements: • US Person Status Required Compensation and Benefits: Pay Range: $140,700 - $175,950

Integration & Component Design Engineer

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